The present invention relates generally to a method for making high-density integrated circuits ICs) and, more particularly, to a method for decreasing the fringing capacitance and increasing the speed-power product of such ICs.
In the manufacture of ICs, it is desirable, in some cases, for the substrate of the ICs to be semi-insulating (ie., have very high resistivity). Such semi-insulating substrates advantageously decrease fringing capacitance and improve the speed-power product of p-n junctions built thereon. This, in turn, allows for closer spacing of p-n junctions and, hence, an increase in the density of active circuit devices that are built on the substrate.
The prior art describes various fabrication methods to produce an IC with a high resistivity substrate. Those methods are, however, disadvantaged by drawbacks related either to limitations of the particular substrate chosen or limitations of the fabrication process itself.
In a first group of methods for manufacturing semiconductor devices on low-conductivity substrate, the low conductivity substrates are first formed, and then semiconductor devices are fabricated thereon. The substrates used in such methods include: (1) gallium arsenide and other wide gap semiconductors, (2) sapphire, (3) pure silicon and (4) compensated silicon.
Surveying the methods used in conjunction with these substrates, gallium arsenide (GaAs) has been made semi-insulating by growing it under very high purity conditions or by doping it with chromium. Unfortunately, the process is not applicable for use with silicon.
As to item (2), sapphire, a high resistivity substrate is formed by growing an epitaxial silicon layer thereon. But silicon-on-sapphire integrated circuits are much more costly than silicon ICs.
Item (3), super-pure silicon, has high-resistivity (up to 2xc3x97105 Ohm cm at room temperature). While initially semi-insulating, the resistivity drops to about 100 Ohm cm due to the accumulation of contaminants and oxygen donors that occurs as semiconductor devices are fabricated on such silicon.
In yet another technique, gold (or platinum) is diffused into silicon to increase the resistivity thereof A drawback to this approach is that the diffused gold tends to contaminate semiconductor devices that are formed on the silicon.
In a second group of processes for manufacturing semiconductor devices on low-conductivity substrate, semi-conductor devices are at least partially fabricated on a substrate, and then the substrate is rendered semi-insulating. One way to do this is by irradiating the device/substrate followed by annealing. Typically, irradiating/annealing methods use irradiating particles having energies in the millions of electron-volts (MeV) range and use an annealing temperature that is in the range of 250xc2x0 C. to 450xc2x0 C. A survey of such prior art follows.
In U.S. Pat. No. 4,469,527, Sugano et al. use high-flux thermal neutron irradiation to reduce silicon substrate conductivity. The irradiation introduces disordered regions in the silicon surface layer. After irradiation, Sugano et al. use pulsed laser processing with surface melting to anneal the disordered regions. In the Sugano et al. process, the dielectric parts (gates, etc.) of semiconductor devices are fabricated after neutron irradiation and after pulsed annealing. As a consequence, low temperature SiO2 growth processes must be used in order not to heal the radiation-induced defects in the substrate that provide the substrate with its high resistivity. In particular, Sugano et al. use plasma anodization to grow SiO2. Gate oxides produced by anodization tend to be of low quality. Moreover, neutron irradiation produces radioactive isotopes in the silicon substrates causing potentially dangerous radioactivity.
In U.S. Pat. No. 5,017,508, Dodt et al. use the irradiation/anneal process to control minority carrier lifetimes in power semiconductor devices of IGBT (insulated-gate-bipolar-transistor) type. In particular, high-energy electrons are introduced into the semiconductor device, which electrons displace silicon atoms from their normal lattice positions. The displaced atoms interact with the silicon or dopant atoms to form combinations of atoms having energy levels between the normal conduction and valence bands of silicon. These energy levels act as recombination centers, which reduce minority carrier lifetimes. Such control of minority carrier lifetime results in improved device characteristics. After irradiation, Dodt anneals the wafer/device to restore operability to fully-fabricated semiconductor devices.
In the power devices to which Dodt et al. is directed, current flows through the entire substrate. Consequently, in such devices, the substrate must not be rendered semi-insulating. To this end, Dodt et al. use relatively low dose irradiation, typically less then 10 Mrad, i.e. less than about 1015 cmxe2x88x922 of MeV-range energy electrons. (The term xe2x80x9cdosexe2x80x9d refers to the amount of radiation, not the energy thereof.) Such a dose is insufficient to significantly reduce the silicon substrate resistivity.
In U.S. Pat. No. 4,201,598, Tanaka et al. use the basic irradiation/annealing steps described above to remove or heal undesirable changes in the insulating portion of a semiconductor device while keeping desirable changes in the semiconductor portion of the device. Typically, radiation-induced changes in materials properties are caused by atomic displacements. Subsequent annealing promotes the return of displaced atoms (i.e., defects) to their initial locations, thereby canceling the action of the radiation and restoring the initial properties of the materials.
Tanaka et al. uses an annealing temperature that is in a range of between 250xc2x0 C. and 350xc2x0 C. to anneal a dielectric portion (ie., glass), but not semiconductor portions. The Tanaka et al. process is not applicable to CMOS. In particular, a MOSFET comprises both dielectric and semiconductor portions, and both such portions must be healed (i.e., annealed) to recover the operability thereof. Since Tanaka et al. anneal only the dielectric portion, the technique cannot be used for CMOS devices.
In U.S. Pat. No. 5,292,672, Akiyama et al. use spatially localized control of properties of the semiconductor portions of the semiconductor device using proton irradiation. Accelerated protons cause atomic displacements in materials at a depth at which they lose their energy and stop. This depth is in the range of about 0.1 to 10 microns from the surface, as a function of the initial energy of the accelerated protons. The protons also slightly affect the insulator layers of the semiconductor device before coming to rest. Akiyama et al. use subsequent annealing to heal the insulator portions of the semiconductor device. The accelerated protons disadvantageously do not render the entire semiconductor substrate semi-insulating, such that benefits of a semi-insulating substrate are not obtained.
In U.S. Pat. No. 4,684,413, Goodman et al. uses the irradiation/annealing process to improve the switching speed of semiconductor devices. Irradiation is also used to reduce minority carrier lifetime in the semiconductor portions of the semiconductor device. Annealing is used to remove radiation-induced defects that have a low thermal stability within the temperature operating range of the semiconductor device. Without such annealing, the presence of the low thermal stability-type defects would change the characteristics of the operating device. Unfortunately, Goodman et al., like Tanaka et al., is not applicable to CMOS.
In U.S. Pat. No. 4,479,829, Kniepkamp irradiates gallium arsenide substrate/prefabricated semiconductor devices with electrons to render the substrate highly resistive. Kniepkamp is not, however, applicable to silicon-based structures. A second disadvantage of Kniepkamp""s process is the use of pulsed laser annealing for localized annealing. Laser annealing has low efficiency as a method for localized annealing and it is also complicated.
In U.S. Pat. No. 4,238,694, Kimerling et al. anneals radiation-induced defects in prefabricated semiconductor devices to obtain new functionality for the devices. Kimerling et al. uses localized heating caused by electrical current to achieve localized annealing. Such electrical heating has severe limitations with substantially curtail its usefulness.
In particular, in a typical IC, there may be hundreds of thousands or even millions of transistors. After irradiation, each of these transistors should be healed. But there are relatively few input/output wires that can be used for localized electrical heating. If such wires were used to attempt to anneal the complete IC, the current will find a shortest path and flow that way, leaving the major part of the IC unannealed and non-functioning. Kimerling is directed to a specific type of ICxe2x80x94a programmable gate array having separate contacts to each transistor in the array. For such an application, localized electrical heating is presumably suitable. This method is not, however, generally applicable.
In U.S. Pat. No. 4,459,159, O""Mara describes starting with an oxygenated silicon substrate and then forming semiconductor devices thereon. The silicon substrate is rendered semi-insulating after device formation by heating the substrate to about 450xc2x0 C. Such temperatures produce donors from the interstitial oxygen within the substrate. These donors neutralize the dopant (e.g., boron), thereby increasing the resistivity of the substrate.
In xe2x80x9cA Novel VLSI Process Using Electron Irradiation and Laser Annealing,xe2x80x9d IEEE 1992 BiPolar Circuits and Technology Meeting, pp. 121-124, Usenko describes converting a silicon low resistance substrate into semi-insulative substrate using irradiation followed by localized laser annealing. This publication, and all patents cited in this xe2x80x9cBackgroundxe2x80x9d section are incorporated by reference herein.
In summary, the prior art describes localized device revival wherein a substrate and overlying semiconductor device are irradiated (i.e., damaged) and then defects in the semiconductor device only are xe2x80x9chealedxe2x80x9d by localized heating, such as by application of a laser or electrical current to a specified region. Moreover, the prior art describes some processes wherein the substrate and overlying semiconductor devices are irradiated, but the dose (not energy) of radiation is insufficient to substantially affect the resistivity of the complete substrate. A need therefore exists for a process capable of rendering a substrate resistive, but that accomplishes localized healing in a way that avoids the drawbacks of the prior art.
In some embodiments of a method in accordance with the present invention, a high resistivity or semi-insulating substrate having active semiconductor devices disposed thereon is formed.
In one embodiment in accordance with the present teachings, shallow impurities that are present throughout the substrate and overlying semiconductor devices of a processed semiconductor substrate are electrically deactivated via irradiation with a beam of accelerated electrons or other particles. As used in this Specification, the phrase xe2x80x9cprocessed semiconductor substratexe2x80x9d refers to a semiconductor substrate having at least partially formed semiconductor devices disposed thereon. Such irradiation generates crystal lattice defects throughout the substrate and throughout overlying semiconductor devices. In some embodiments, the irradiation is carried out at a dosage that is sufficient to render the entire substrate semi-insulating.
The operability of the semiconductor devices that are disposed on the substrate is restored by thermal annealing. The thermal annealing step is carried out in such a way as to restore properties of the semiconductor devices (including prefabricated insulating layers, insulator-semiconductor interfaces and thin semiconductor films underneath the interfaces) but not the bulk substrate, which remains semi-insulating. In other words, as in the prior art, the present inventor uses spatially localized annealing to restore the operability of semiconductor devices while retaining the radiation-induced high resistivity of the substrate. But the manner in which spatially localized annealing is effected in the present invention is different than in the prior art.
In particular, the present inventor has recognized that spatially localized annealing is advantageously performed by utilizing a differential in the annealing behavior of the bulk/interior regions of the silicon substrate, on the one hand, and the surface/interface regions of the silicon substrate, on the other hand. In particular, the surface/interface regions xe2x80x9chealxe2x80x9d or xe2x80x9crestorexe2x80x9d at temperatures that are about 100xc2x0 C. to 170xc2x0 C. lower than bulk regions. Thus, in accordance with some embodiments of the present invention, processed semiconductor substrate is annealed, in total, at appropriately-selected annealing conditions (e.g., temperature). Due to the differential in annealing behavior, the semiconductor devices heal, while the bulk substrate does not. As a consequence, the substrate remains semi-insulating while the semiconductor devices are restored to operability.
Embodiments of the present method therefore avoid the drawbacks associated with localized illumination/heating, as practiced in the prior art, to achieve localized annealing.
Since the semiconductor device is fabricated in a semiconductive layer that is formed at the surface of the semi-insulating substrate produced by irradiation, no junction capacitance is produced at the P-N junction and the capacitance relative to ground is reduced. The reduced capacitance decreases delay time. As a consequence, the operating frequency bandwidth of the semiconductor devices is broadened and the operating speed of the semiconductor devices is increased relative to semiconductor devices that are disposed on substrates having lower resistivity.